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Table 63: Identify Device Information
Word
Address
Default
Value
Total
Bytes
Data Field Type Information
General Configuration (REMOVABLE, signature of the CompactFlash Memory Card) In
0
848Ah*
045Ah*
2
2
PCMCIA mode the HxBK cards have normally the value 848Ah
but other configurations are possible
Alternate Configuration FIX,
In IDE mode the HxBK cards have normally the value 045Ah
but other configurations are possible
1
2
3
4
5
6
7-8
9
10-19
20
21
22
23-26
27-46
47
48
49
50
51
52
53
54
55
56
57-58
59
60-61
62
63
64
65
66
67
68
69-79
80-81
XXXXh
0000h
00XXh
0000h
0200h
XXXXh
XXXXh
0000h
aaaa
0002h
0002h
0004h
aaaa*
aaaa*
800Xh
0000h
0F00h*
0E00h*
0000h
0200h
0000h
0007h*
XXXXh
XXXXh
XXXXh
XXXXh
0101h
XXXXh
0000h
0007h*
0000h*
0003h
0078h*
0000h*
0078h*
0000h*
0078h*
0078h*
0000h
0020h
0000h
2
2
2
2
2
2
4
2
20
2
2
2
8
40
2
2
2
2
2
2
2
2
2
2
4
2
4
2
2
2
2
2
2
2
22
4
Default number of cylinders
Reserved
Default number of heads
Obsolete
Obsolete
Default number of sectors per track
Number of sectors per Card (Word 7 = MSW, Word 8 = LSW)
Obsolete
Serial number in ASCII (right justified)
Obsolete
Obsolete
Reserved
Firmware revision in ASCII. Big Endian Byte Order in Word
Model number in ASCII (right justified) Big Endian Byte Order in Word
( “SFCFxxxxHxBKxxx -x-xx-xxx-xxx ” )
Maximum number of sectors on Read/Write Multiple command
X=1 for cards with 1 flash, X=2 for cards with more flash
Reserved
Capabilities with DMA
without DMA (also in PCMCIA mode)
Reserved
PIO data transfer cycle timing mode
Obsolete
Field validity
Current numbers of cylinders
Current numbers of heads
Current sectors per track
Current capacity in sectors (LBAs)(Word 57 = LSW, Word 58 = MSW)
Multiple sector setting
Total number of sectors addressable in LBA Mode
Reserved.
Multi-Word DMA transfer.
In PCMCIA mode, this value is ‘0 000 h’.
Advanced PIO modes supported
Minimum Multi-Word DMA transfer cycle time per Word.
In PCMCIA mode, this value is ‘0 000 h’.
Recommended Multi-Word DMA transfer cycle time.
In PCMCIA mode, this value is ‘0 000 h’.
Minimum PIO transfer cycle time without flow control
Minimum PIO transfer cycle time with IORDY flow control
Reserved
ATA version 5
740Xh*
82 -84
5004h*
6
Features/command sets supported
4000h*
740Xh*
85-87
1004h*
6
Features/command sets enabled
4000h*
88
89
90
91
92-127
128
129-159
101Fh*
0000h
0000h
0000h
0000h*
0000h
0000h
2
2
2
2
72
2
62
Ultra DMA Mode Supported and Selected 0,1,2,3,4 (changes in operation)
Time required for Security erase unit completion
Time required for Enhanced security erase unit completion
Current Advanced power mana9ementvalue
Reserved
Security status
vendor unique bytes
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.51
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
C-300_data_sheet_CF-HxBK_Rev151.doc
Page 63 of 99
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